RegViz: Visualize GTUPSR Bitfield

Renesas Electronics /R7FA6T2BD /GPT320 /GTUPSR

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as GTUPSR

USELCF=0, USGTRGDF=0, USGTRGDR=0, USGTRGCF=0, USCBFAH=0, USGTRGCR=0, USILVL=0000, USGTRGAF=0, USELCB=0, USGTRGBR=0, USELCC=0, USELCG=0, USELCD=0, USCAFBL=0, USELCH=0, USCAFBH=0, USGTRGBF=0, USCBRAH=0, USCARBL=0, USGTRGAR=0, USCARBH=0, USELCA=0, USCBFAL=0, USELCE=0, USCBRAL=0

Description

General PWM Timer Up Count Source Select Register

Fields

USGTRGAR	GTETRGA Pin Rising Input Source Counter Count Up Enable 0 (0): Counter count up disabled on the rising edge of GTETRGA input 1 (1): Counter count up enabled on the rising edge of GTETRGA input
USGTRGAF	GTETRGA Pin Falling Input Source Counter Count Up Enable 0 (0): Counter count up disabled on the falling edge of GTETRGA input 1 (1): Counter count up enabled on the falling edge of GTETRGA input
USGTRGBR	GTETRGB Pin Rising Input Source Counter Count Up Enable 0 (0): Counter count up disabled on the rising edge of GTETRGB input 1 (1): Counter count up enabled on the rising edge of GTETRGB input
USGTRGBF	GTETRGB Pin Falling Input Source Counter Count Up Enable 0 (0): Counter count up disabled on the falling edge of GTETRGB input 1 (1): Counter count up enabled on the falling edge of GTETRGB input
USGTRGCR	GTETRGC Pin Rising Input Source Counter Count Up Enable 0 (0): Counter count up disabled on the rising edge of GTETRGC input 1 (1): Counter count up enabled on the rising edge of GTETRGC input
USGTRGCF	GTETRGC Pin Falling Input Source Counter Count Up Enable 0 (0): Counter count up disabled on the falling edge of GTETRGC input 1 (1): Counter count up enabled on the falling edge of GTETRGC input
USGTRGDR	GTETRGD Pin Rising Input Source Counter Count Up Enable 0 (0): Counter count up disabled on the rising edge of GTETRGD input 1 (1): Counter count up enabled on the rising edge of GTETRGD input
USGTRGDF	GTETRGD Pin Falling Input Source Counter Count Up Enable 0 (0): Counter count up disabled on the falling edge of GTETRGD input 1 (1): Counter count up enabled on the falling edge of GTETRGD input
USCARBL	GTIOCnA Pin Rising Input during GTIOCnB Value Low Source Counter Count Up Enable 0 (0): Counter count up disabled on the rising edge of GTIOCnA input when GTIOCnB input is 0 1 (1): Counter count up enabled on the rising edge of GTIOCnA input when GTIOCnB input is 0
USCARBH	GTIOCnA Pin Rising Input during GTIOCnB Value High Source Counter Count Up Enable 0 (0): Counter count up disabled on the rising edge of GTIOCnA input when GTIOCnB input is 1 1 (1): Counter count up enabled on the rising edge of GTIOCnA input when GTIOCnB input is 1
USCAFBL	GTIOCnA Pin Falling Input during GTIOCnB Value Low Source Counter Count Up Enable 0 (0): Counter count up disabled on the falling edge of GTIOCnA input when GTIOCnB input is 0 1 (1): Counter count up enabled on the falling edge of GTIOCnA input when GTIOCnB input is 0
USCAFBH	GTIOCnA Pin Falling Input during GTIOCnB Value High Source Counter Count Up Enable 0 (0): Counter count up disabled on the falling edge of GTIOCnA input when GTIOCnB input is 1 1 (1): Counter count up enabled on the falling edge of GTIOCnA input when GTIOCnB input is 1
USCBRAL	GTIOCnB Pin Rising Input during GTIOCnA Value Low Source Counter Count Up Enable 0 (0): Counter count up disabled on the rising edge of GTIOCnB input when GTIOCnA input is 0 1 (1): Counter count up enabled on the rising edge of GTIOCnB input when GTIOCnA input is 0
USCBRAH	GTIOCnB Pin Rising Input during GTIOCnA Value High Source Counter Count Up Enable 0 (0): Counter count up disabled on the rising edge of GTIOCnB input when GTIOCnA input is 1 1 (1): Counter count up enabled on the rising edge of GTIOCnB input when GTIOCnA input is 1
USCBFAL	GTIOCnB Pin Falling Input during GTIOCnA Value Low Source Counter Count Up Enable 0 (0): Counter count up disabled on the falling edge of GTIOCnB input when GTIOCnA input is 0 1 (1): Counter count up enabled on the falling edge of GTIOCnB input when GTIOCnA input is 0
USCBFAH	GTIOCnB Pin Falling Input during GTIOCnA Value High Source Counter Count Up Enable 0 (0): Counter count up disabled on the falling edge of GTIOCnB input when GTIOCnA input is 1 1 (1): Counter count up enabled on the falling edge of GTIOCnB input when GTIOCnA input is 1
USELCA	ELC_GPTA Event Source Counter Count Up Enable 0 (0): Counter count up disabled at the ELC_GPTA input 1 (1): Counter count up enabled at the ELC_GPTA input
USELCB	ELC_GPTB Event Source Counter Count Up Enable 0 (0): Counter count up disabled at the ELC_GPTB input 1 (1): Counter count up enabled at the ELC_GPTB input
USELCC	ELC_GPTC Event Source Counter Count Up Enable 0 (0): Counter count up disabled at the ELC_GPTC input 1 (1): Counter count up enabled at the ELC_GPTC input
USELCD	ELC_GPTD Event Source Counter Count Up Enable 0 (0): Counter count up disabled at the ELC_GPTD input 1 (1): Counter count up enabled at the ELC_GPTD input
USELCE	ELC_GPTE Event Source Counter Count Up Enable 0 (0): Counter count up disabled at the ELC_GPTE input 1 (1): Counter count up enabled at the ELC_GPTE input
USELCF	ELC_GPTF Event Source Counter Count Up Enable 0 (0): Counter count up disabled at the ELC_GPTF input 1 (1): Counter count up enabled at the ELC_GPTF input
USELCG	ELC_GPTG Event Source Counter Count Up Enable 0 (0): Counter count up disabled at the ELC_GPTG input 1 (1): Counter count up enabled at the ELC_GPTG input
USELCH	ELC_GPTH Event Source Counter Count Up Enable 0 (0): Counter count up disabled at the ELC_GPTH input 1 (1): Counter count up enabled at the ELC_GPTH input
USILVL	External Input Level Source Count-Up Enable 0 (0000): Disables count-up by external input level 1 (0001): Setting prohibited 2 (0010): Enables count-up by GTIOCnA pin input level 0 3 (0011): Enables count-up by GTIOCnA pin input level 1 4 (0100): Enables count-up by GTIOCnB pin input level 0 5 (0101): Enables count-up by GTIOCnB pin input level 1 6 (0110): Setting prohibited 7 (0111): Setting prohibited 8 (1000): Enables count-up by GTETRGA pin input level 0 9 (1001): Enables count-up by GTETRGA pin input level 1 10 (1010): Enables count-up by GTETRGB pin input level 0 11 (1011): Enables count-up by GTETRGB pin input level 1 12 (1100): Enables count-up by GTETRGC pin input level 0 13 (1101): Enables count-up by GTETRGC pin input level 1 14 (1110): Enables count-up by GTETRGD pin input level 0 15 (1111): Enables count-up by GTETRGD pin input level 1

Links

() ()